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INTEGRATED CIRCUITS
74ALVCH16646 16-bit bus transceiver/register (3-State)
Product specification IC24 Data Handbook 1998 Sep 03
Philips Semiconductors
Philips Semiconductors
Product specification
16-bit bus transceiver/register (3-State)
74ALVCH16646
FEATURES
* Complies with JEDEC standard no. 8-1A * CMOS low power consumption * MULTIBYTETM flow-through pin-out architecture * Low inductance, multiple VCC and ground pins for minimum noise
and ground bounce
minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
PIN CONFIGURATION
1DIR 1 1CPAB 2 1SAB 3 GND 4 1A0 5 1A1 6 VCC 7 1A2 8 1A3 9 56 1OE 55 1CPBA 54 1SBA 53 GND 52 1B0 51 1B1 50 VCC 49 1B2 48 1B3 47 1B4 46 GND 45 1B5 44 1B6 43 1B7 42 2B0 41 2B1 40 2B2 39 GND 38 2B3 37 2B4 36 2B5 35 VCC 34 2B6 33 2B7 32 GND 31 2SBA 30 2CPBA 29 2OE
* Direct interface with TTL levels * Current drive 24 mA at 3.0 V * Output drive capability 50 transmission lines @ 85C * All inputs have bushold circuitry
DESCRIPTION
The 74ALVCH16646 consists of 16 non-inverting bus transceiver circuits with 3-State outputs, D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the internal registers. Data on the `A' or `B' bus will be clocked in the internal registers, as the appropriate clock (CPAB or CPBA) goes to a HIGH logic level. Output enable (OE) and direction (DIR) inputs are provided to control the transceiver function. In the transceiver mode, data present at the high-impedance port may be stored in either the `A' or `B' register, or in both. The select source inputs (SAB and SBA) can multiplex stored and real-time (transparent mode) data. The direction (DIR) input determines which bus will receive data when OE is active (LOW). In the isolation mode (OE = HIGH), `A' data may be stored in the `B' register and/or `B' data may be stored in the `A' register. When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, `A' or `B' may be driven at a time. To ensure the high impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the
1A4 10 GND 11 1A5 12 1A6 13 1A7 14 2A0 15 2A1 16 2A2 17 GND 18 2A3 19 2A4 20 2A5 21 VCC 22 2A6 23 2A7 24 GND 25 2SAB 26 2CPAB 27 2DIR 28
SY00011
QUICK REFERENCE DATA
GND = 0V; Tamb = 25C; tr = tf 2.5ns SYMBOL tPHL/tPLH CI CPD Fmax PARAMETER Propagation delay nAx to nBx Input capacitance Power dissipation capacitance per channel Maximum clock frequency VI = GND to VCC1 VCC = 2.5V, CL = 30pF VCC = 3.3V, CL = 50pF Outputs enabled Outputs disabled CONDITIONS VCC = 2.5V, CL = 30pF VCC = 3.3V, CL = 50pF TYPICAL 2.6 2.7 3.0 36 4 300 320 UNIT ns pF pF MHz
NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD x VCC2 x fi + S (CL x VCC2 x fo) where: fi = input frequency in MHz; CL = output load capacity in pF; fo = output frequency in MHz; VCC = supply voltage in V; S (CL x VCC2 x fo) = sum of outputs.
ORDERING INFORMATION
PACKAGES 56-Pin Plastic TSSOP Type II TEMPERATURE RANGE -40C to +85C OUTSIDE NORTH AMERICA 74ALVCH16646 DGG NORTH AMERICA ACH16646 DGG DWG NUMBER SOT364-1
1998 Sep 03
2
853-2116 19959
Philips Semiconductors
Product specification
16-bit bus transceiver/register (3-State)
74ALVCH16646
PIN DESCRIPTION
PIN NUMBER 1, 28 2, 27 3, 26 5, 6, 8, 9, 10, 12, 13, 14 4, 11, 18, 25, 32, 39, 46, 53 7, 22, 35, 50 15, 16, 17, 19, 20, 21, 23, 24 29, 56 30, 55 31, 54 42, 41, 40, 38, 37, 36, 34, 33 52, 51, 49, 48, 47, 45, 44, 43 SYMBOL nDIR nCPAB nSAB 1A0 to 1A7 GND VCC 2A0 to 2A7 nOE nCPBA nSBA 2B0 to 2B7 1B0 to 1B7 NAME AND FUNCTION Direction control input Clock input A-to-B Select input A-to-B Data inputs/outputs
BUSHOLD CIRCUIT
VCC
Data Input
To internal circuit
Ground (0V) Positive supply voltage Data inputs/outputs Output enable Clock input B-to-A Select input B-to-A Data inputs/outputs Data inputs/outputs
1CPBA 1SBA 1CPAB 1SAB
SW00050
LOGIC SYMBOL (IEEE/IEC)
1OE 1DIR 56 1 55 54 2 3 29 28 30 31 27 26 G3 3EN1[BA] 3EN2[AB] C4 G5 C6 G7 G10 10EN8[BA] 10EN9[AB] C11 G12 C13 G14
31
LOGIC SYMBOL
5 6 8 9 10 12 1A0 1A1 1B0 1B1 52 51 15 2A0 16 2A1 17 2A2 19 2A3 20 2A4 21 2A5 23 2A6 24 2A7 29 2OE 28 2DIR 26 2SAB 31 2SBA 27 2CPAB 30 2CPBA 2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7 42 41 40 38 37 36 34 33
2OE 2DIR 2CPBA 2SBA 2CPAB 2SAB
1A2 1A3 1A4 1A5 13 1A6 14 1A7 56 1OE 1 1DIR 2 1SAB 54 1SBA 2 1CPAB 55 1CPBA
1B2 49 1B3 48 1B4 47 1B5 45 1B6 44 1B7 43
1A0
5
1 6D 7 17
5 5
4D 1
31
52
1B0
2 51 49 48 47 45 44 43 42 1B1 1B2 1B3 1B4 1B5 1B6 1B7 2B0
1A1 1A2 1A3 1A4 1A5 1A6 1A7 2A0
6 8 9 10 12 13 14 15 w1 8 13D 14 1 14 12 11D 12 1 w1 9
SY00013
2A1 2A2 2A3 2A4 2A5 2A6 2A7
16 17 19 20 21 23 24
41 40 38 37 36 34 33
2B1 2B2 2B3 2B4 2B5 2B6 2B7
SY00014
1998 Sep 03
3
Philips Semiconductors
Product specification
16-bit bus transceiver/register (3-State)
74ALVCH16646
LOGIC DIAGRAM (one section)
OE
DIR SBA CPBA SAB CPAB
VCC S Y An D1 D2 Q FFn CP D MUX
VCC S D1 D FFn CP 8 IDENTICAL CHANNELS Q D2 Y Bn MUX
SY00012
FUNCTION TABLE
INPUTS nOE X X H H L L L L * un H L X nDIR X X X X L L nCPAB X H or L X X nCPBA X H or L X H or L nSAB X X X X X X nSBA X X X X L H input un* input output DATA I/O * nAx nBx un* input input input FUNCTION store A, B unspecified* store B, A unspecified* store A and B data, isolation hold storage real-time B data to A bus stored B data to A bus
H X X L X real-time A data to B bus input output H H or L X H X stored A data to B bus The data output functions may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled, i.e., data at the bus inputs will be stored on every LOW-to-HIGH transition on the clock inputs. = unspecified = HIGH voltage level = LOW voltage level = don't care = LOW-to-HIGH level transition
1998 Sep 03
4
Philips Semiconductors
Product specification
16-bit bus transceiver/register (3-State)
74ALVCH16646
RECOMMENDED OPERATING CONDITIONS
LIMITS SYMBOL PARAMETER DC supply voltage 2.5V range (for max. speed performance @ 30 pF output load) VCC DC supply voltage 3.3V range (for max. speed performance @ 50 pF output load) DC Input voltage range DC output voltage range Operating free-air temperature range Input rise and fall times VCC = 2.3 to 3.0V VCC = 3.0 to 3.6V CONDITIONS MIN 2.3 3.0 0 0 -40 0 0 MAX 2.7 V 3.6 VCC VCC +85 20 10 V V C ns/V UNIT
VI VO Tamb tr, tf
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced to GND (ground = 0V) SYMBOL VCC IIK VI IOK VO IO IGND, ICC Tstg PTOT PARAMETER DC supply voltage DC input diode current DC in ut voltage input DC output diode current DC output voltage DC output source or sink current DC VCC or GND current Storage temperature range Power dissipation per package -plastic thin-medium-shrink (TSSOP) For temperature range: -40 to +125 C above +55C derate linearly with 11.3 mW/K above +55C derate linearly with 8 mW/K VI t0 For control For data pins1 inputs1 CONDITIONS RATING -0.5 to +4.6 -50 -0.5 to +4.6 -0.5 to VCC +0.5 "50 -0.5 to VCC +0.5 "50 "100 -65 to +150 850 600 V mA V mA mA C mW UNIT V mA
VO uVCC or VO t 0 Note 1 VO = 0 to VCC
NOTE: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Sep 03
5
Philips Semiconductors
Product specification
16-bit bus transceiver/register (3-State)
74ALVCH16646
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V). LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40C to +85C MIN VIH HIGH level Input voltage VCC = 2.3 to 2.7V VCC = 2.7 to 3.6V LOW level Input voltage VCC = 2.3 to 2.7V VCC = 2.7 to 3.6V VCC = 2 3 to 3 6V; VI = VIH or VIL; IO = -100A 100A 2.3 3.6V; VCC = 2.3V; VI = VIH or VIL; IO = -6mA VO OH HIGH level output voltage VCC = 2.3V; VI = VIH or VIL; IO = -12mA VCC = 2.7V; VI = VIH or VIL; IO = -12mA VCC = 3.0V; VI = VIH or VIL; IO = -12mA VCC = 3.0V; VI = VIH or VIL; IO = -24mA VCC = 2 3 to 3 6V; VI = VIH or VIL; IO = 100A 2.3 3.6V; VCC = 2.3V; VI = VIH or VIL; IO = 6mA VOL LOW level output voltage VCC = 2.3V; VI = VIH or VIL; IO = 12mA VCC = 2.7V; VI = VIH or VIL; IO = 12mA VCC = 3.0V; VI = VIH or VIL; IO = 24mA II IOZ ICC ICC IBHL Input leakage current g 3-State output OFF-state current Quiescent supply current Additional quiescent supply current Bus hold LOW sustaining current VCC = 2 3 to 3 6V; 2.3 3.6V; VI = VCC or GND VCC = 2.7 to 3.6V; VI = VIH or VIL; VO = VCC or GND VCC = 2.3 to 3.6V; VI = VCC or GND; IO = 0 VCC = 2.3V to 3.6V; VI = VCC - 0.6V; IO = 0 VCC = 2.3V; VI = 0.7V2 VCC = 3.0V; VI = Bus hold HIGH sustaining current Bus hold LOW overdrive current Bus hold HIGH overdrive current 0.8V2 45 75 -45 -75 500 -500 -175 VCC*0.2 02 VCC*0.3 VCC*0.6 VCC*0.5 VCC*0.6 VCC*1.0 1.7 2.0 TYP1 1.2 V 1.5 1.2 1.5 VCC VCC*0.08 VCC*0.26 VCC*0.14 VCC*0.09 VCC*0.28 GND 0.07 0.15 0.14 0.27 0.1 0.1 0.2 150 - 150 0.20 0 20 0.40 0.70 0.40 0.55 5 10 40 750 A A A A A V V V V 0.7 V 0.8 MAX UNIT
VIL
IBHH IBHLO IBHHO
VCC = 2.3V; VI = 1.7V2 VCC = 3.0V; VI = VCC = 3.6V2 VCC = 3.6V2 2.0V2
A A A
NOTES: 1. All typical values are at Tamb = 25C. 2. Valid for data inputs of bus hold parts.
1998 Sep 03
6
Philips Semiconductors
Product specification
16-bit bus transceiver/register (3-State)
74ALVCH16646
AC CHARACTERISTICS FOR VCC = 2.3V TO 2.7V RANGE
GND = 0V; tr = tf 2.0ns; CL = 30pF SYMBOL LIMITS PARAMETER Propagation delay nAx to nBx, nBx to nAx tPLH/tPHL Propagation delay nCPAB to nBx, nCPBA to nAx Propagation delay nSAB to nBx, nSBA to nAx tPZH/tPZL tPHZ/tPLZ tPZH/tPZL tPHZ/tPLZ tW tSU th 3-State output enable time nOE to nAx, nBx 3-State output disable time nOE to nAx, nBx 3-State output enable time nDIR to nAx, nBx 3-State output disable time nDIR to nAx, nBx Pulse width HIGH or LOW nCPAB, nCPBA Set up time nAx to nCPAB, nBx to nCPBA Hold time nAx to nCPAB, nBx to nCPBA WAVEFORM MIN 1 3 2 4 4 5 5 3 3 3 3 1.0 1.0 1.0 1.0 1.6 1.0 1.5 3.3 1.6 0.6 150 VCC = 2.5V 0.2V TYP 2.7 3.4 3.4 3.3 2.8 3.4 3.0 1.2 0.2 0.1 300 MAX 4.8 5.6 6.8 6.5 5.7 7.8 6.5 ns ns ns ns ns ns ns MHz ns UNIT
Fmax Maximum clock pulse frequency NOTE: 1. All typical values are at VCC = 2.5V and Tamb = 25C.
AC CHARACTERISTICS FOR VCC = 3.0V TO 3.6V RANGE AND VCC = 2.7V
GND = 0V; tr = tf = 2.5ns; CL = 50pF LIMITS SYMBOL PARAMETER Propagation delay nAx to nBx, nBx to nAx Propagation delay nCPAB to nBx, nCPBA to nAx Propagation delay nSAB to nBx, nSBA to nAx 3-State output enable time nOE to nAx, nBx 3-State output disable time nOE to nAx, nBx 3-State output enable time nDIR to nAx, nBx 3-State output disable time nDIR to nAx, nBx Pulse width HIGH or LOW nCPAB, nCPBA Set up time nAx to nCPAB, nBx to nCPBA Hold time nAx to nCPAB, nBx to nCPBA WAVEFORM VCC = 3.3V 0.3V MIN tPHL/tPLH tPHL/tPLH tPHL/tPLH tPZH/tPZL tPHZ/tPLZ tPZH/tPZL tPHZ/tPLZ tW tSU th 1 3 2 4 4 5 5 3 3 3 3 1.0 1.4 1.3 1.0 1.0 1.4 1.4 3.3 1.4 0.7 150 TYP1, 2 2.6 2.9 3.1 2.3 2.9 3.0 2.5 0.7 0.3 0.2 320 MAX 3.9 4.5 5.3 5.1 4.7 5.1 5.3 MIN 1.0 1.4 1.3 1.0 1.0 1.4 1.4 3.3 1.7 0.4 150 VCC = 2.7V TYP1 2.8 3.1 3.5 3.2 3.1 3.4 3.3 1.0 0.2 0.1 320 MAX 4.5 5.2 6.4 6.2 5.0 6.2 6.0 ns ns ns ns ns ns ns ns ns ns MHz UNIT
Fmax Maximum clock pulse frequency NOTES: 1. All typical values are at Tamb = 25C. 2. VCC = 3.3V
1998 Sep 03
7
Philips Semiconductors
Product specification
16-bit bus transceiver/register (3-State)
74ALVCH16646
AC WAVEFORMS
nAx or nBx
nCPBA or nCPAB
1/fMAX nCPBA or nCPAB
3.0V or VCC whichever is less VM 0V nOE, nDIR VM nDIR VOH tPZH tPHZ VOH VOL nAx or nBx VM VY VM
VM tw(H) tPHL
VM tw(L)
tPLH VM VM
nAx or nBx
SH00030
Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency
Waveform 5. 3-State Output Enable Time to High Level and Output Disable Time from High Level
3.0V or VCC nSBA or nSAB VM tPLH nAx or nBx VM tPHL VOH VM VM nAx or nBx VOL nAx or nBx nAx or nBx nOE, nDIR 0V nDIR tPZL tPLZ 3.0V or VCC VM VX VOL 0V VM VM 0V 3.0V or VCC
SH00031
Waveform 2. Propagation Delay, nSAB to nBx or nSBA to nAx, nAx to nBx or nBx to nAx
Waveform 6. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level
3.0V or VCC nSBA or nSAB VM tPHL nAx or nBx VM 0V tPLH VOH VM VM VOL
TEST CIRCUIT
VCC S1 2 x VCC Open GND
PULSE GENERATOR
SH00032
Waveform 3. Propagation Delay, nSBA to nAx or nSAB to nBx
VCC t 2.7V 2.7V - 3.6V VI VCC 2.7V
1998 Sep 03
8
EEEEEEEEE EEE E EEE E EEEEEEEEE EEE EEEEEEE EEE
VM VM VM VM ts(H) th(H) ts(L) th(L) VM VM NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance.
VCC = 2.3 TO 2.7 V RANGE 1. VM = 0.5 V 2. VX = VOL + 0.15V 3. VY = VOH - 0.15V 4. VI = VCC 5. VOL and VOH are the typical output voltage drop that occur with the output load. VCC = 3.0 TO 3.6 V RANGE AND VCC = 2.7 V 1. VM = 1.5 V 2. VX = VOL + 0.3V 3. VY = VOH - 0.3V 4. VI = 2.7 V 5. VOL and VOH are the typical output voltage drop that occur with the output load.
3.0V or VCC
0V
3.0V or VCC
0V
SH00033
Waveform 4. Data Setup and Hold Times
3.0V or VCC whichever is less
0V
0V
SH00034
SH00035
VI D.U.T. RT
VO
500
CL
50pF
500
Test tPLH/tPHL tPLZ/tPZL tPHZ/tPZH
S1 Open 2 x VCC GND
SY00003
Load circuitry for switching times
Philips Semiconductors
Product specification
16-bit bus transceiver/register (3-State)
74ALVCH16646
APPLICATION INFORMATION
REAL TIME BUS TRANSFER BUS B TO BUS A REAL TIME BUS TRANSFER BUS A TO BUS B STORAGE FROM A, B, OR A AND B
A
B
A
B
A
B
}
}
}
nOE L
nDIR nCPAB nCPBA nSAB nSBA L X X X L
nOE L
nDIR nCPAB nCPBA nSAB nSBA H X X L X
nOE L L H
nDIR nCPAB nCPBA nSAB nSBA H X X X L X X X X X X
TRANSFER STORED DATA TO A OR B
A
B
}
X
nOE L L
nDIR nCPAB nCPBA nSAB nSBA L X H|L X H H H|L H X
SH00028
1998 Sep 03
9
Philips Semiconductors
Product specification
16-bit bus transceiver/register (3-State)
74ALVCH16646
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm
SOT364-1
1998 Sep 03
10
Philips Semiconductors
Product specification
16-bit bus transceiver/register (3-State)
74ALVCH16646
NOTES
1998 Sep 03
11
Philips Semiconductors
Product specification
16-bit bus transceiver/register (3-State)
74ALVCH16646
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 08-98 9397-750-04688
Philips Semiconductors
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